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Found 153 entries
  1. Scheduling and Mapping in an Incremental Design Methodology for Distributed Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng, Traian Pop
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 12, Issue 8, August 2004, pp. 793-811.

  2. Analysis and Optimisation of Real-Time Systems with Stochastic Behaviour
    Sorin Manolache
    Ph. D. Thesis No. 983, Dept. of Computer and Information Science, Linköping University, December 2005 (Opponent: Prof. Sharon Hu, University of Notre Dame, USA)

  3. System-on-Chip Test Scheduling and Test Infrastructure Design
    Anders Larsson
    Licentiate Thesis No. 1206, Dept. of Computer and Information Science, Linköping University, November 2005

  4. SOC Test Scheduling with Test Set Sharing and Broadcasting
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    IEEE Asian Test Symposium, Kolkata, India, December 18-21, 2005, pp. 162-167

  5. Introduction to Advanced System-on-Chip Test Design and Optimization
    Erik Larsson
    FRONTIERS IN ELECTRONIC TESTING: Vol.29, Springer, 2005, ISBN: 1-4020-3207-2

  6. Remote Boundary-Scan System Test Control for the ATCA Standard
    David Bäckström, Gunnar Carlsson, Erik Larsson
    International Test Conference (ITC'05), Austin, Texas, USA, November 8-10, 2005

  7. Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
    Erik Larsson, Stina Edbom
    IFIP WG 10.5 Conference on Very Large Scale Integration System-on-Chip (IFIP VLSI-SOC) 2005, Perth, Australia, October 17-19, 2005, pp. 429-434

  8. Multiple Constraints Driven System-on-Chip Test Time Optimization
    Erik Larsson, Julien Pouget, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), Volume 21, Number 6, December 2005, pp. 599-611

  9. Abort-on-Fail Based Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), Volume 21, Number 6, December 2005, pp. 651-658

  10. A Test Data Compression Architecture with Abort-on Fail Capability
    Erik Larsson, Irtiyaz Gilani
    IEEE Workshop on RTL and High Level Testing (WRTLT), Harbin, China, July 20-21, 2005

  11. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    Journal of Computer Science and Technology, Vol.20, No.2, 2005, pp. 216-223

  12. Hybrid Built-In Self-Test and Test Generation Techniques for Digital Systems
    Gert Jervan
    Ph. D. Thesis No. 945, Dept. of Computer and Information Science, Linköping University, May 2005 (Opponent: Prof. Joao Paulo Teixeira, IST/INSESC-ID, Portugal)

  13. High-Level Techniques for Built-In Self-Test Resources Optimization
    Abdil Rashid Mohamed
    Licentiate Thesis No. 1156, Dept. of Computer and Information Science, Linköping University, April 2005

  14. Validation of Embedded Systems using Formal Method aided Verification
    Daniel Karlsson, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 196-199

  15. Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 403-409

  16. Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction
    Dong Wu, Bashir M. Al-Hashimi, Marcus T. Schmitz, Petru Eles
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 34-40

  17. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 83-86

  18. Quasi-Static Scheduling for Multiprocessor Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), Hong Kong, August 17-19, pp. 422-428

  19. Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), Hong Kong, August 17-19, pp. 67-71

  20. Boundary-Scan Test Control in the ATCA Standard
    David Bäckström, Gunnar Carlsson, Erik Larsson
    IEEE European Board Test Workshop, EBTW, Tallinn, Estonia, 25-26 May 2005

  21. Test Generation: A Hierarchical Approach
    Gert Jervan, Raimund Ubar, Zebo Peng, Petru Eles
    Chapter in System-level Test and Validation of Hardware/Software Systems, Springer Series in Advanced Microelectronics, Vol. 17, ISBN 1-85233-899-7, 2005

  22. An Approach to System-Level DFT
    Gert Jervan, Raimund Ubar, Zebo Peng, Petru Eles
    Chapter in System-level Test and Validation of Hardware/Software Systems, Springer Series in Advanced Microelectronics, Vol. 17, ISBN 1-85233-899-7, 2005

  23. Test Scheduling for Modular SOCs in an Abort-on-Fail Environment
    Urban Ingelsson, Sandeep-Kumar Goel, Erik Larsson, Erik-Jan Marinissen
    IEEE European Test Symposium (ETS'05), Tallinn, Estonia, May 22-25, 2005, pp. 8-13

  24. Distributed Embedded Real-Time Systems: Analysis and Exploration
    Paul Pop, Petru Eles, Zebo Peng
    Chapter in Embedded Systems Design: The ARTIST Roadmap for Research and Development, Lecture Notes in Computer Science, Vol. 3436, ISBN 3-540-25107-3, 2005

  25. Automotive Industry
    Paul Pop, Rolf Ernst, Petru Eles, Zebo Peng

  26. Quasi-Static Assignment of Voltages and Optional Cycles for Maximizing Rewards in Real-Time Systems with Energy Constraints
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    42nd Design Automation Conference, Anaheim, CA, June 13-17, 2005, pp. 889-894

  27. Verification and Scheduling Techniques for Real-Time Embedded Systems
    Luis Alejandro Cortes
    Ph. D. Thesis No. 920, Dept. of Computer and Information Science, Linköping University, March 2005 (Opponent: Prof. Franco Fummi, Universita di Verona, Italy)

  28. Fault and EnergyAware Communication Mapping with Guaranteed Latency for Applications Implemented on NoC
    Sorin Manolache, Petru Eles, Zebo Peng
    42nd Design Automation Conference, Anaheim, CA, June 13-17, 2005, pp. 266-269

  29. Energy Minimization for Hybrid BIST in a System-on-Chip Test Environment
    Gert Jervan, Raimund Ubar, Tatjana Shchenova, Zebo Peng
    10th IEEE European Test Symposium (ETS'05) Tallinn, Estonia, May 22-25, 2005, pp. 2-7

  30. An Improved Estimation Technique for Hybrid BIST Test Set Generation
    Gert Jervan, Zebo Peng, Raimund Ubar, Olga Korelina
    IEEE Workshop on Design and Diagnostics of Electronic Circuit and Systems (DDECS), Sopron, Hungary, April 13-16, 2005, pp. 182-185

  31. Cosynthesis of Energy-Efficient Multimode Embedded Systems With Consideration of Mode-Execution Probabilities
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24, Issue 2, Feb. 2005, pp. 153-169

  32. Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    IEE Proceedings Computers & Digital Techniques, special issue with the best contributions from the DATE 2004, Volume 152, Issue 01, January 2005, pp. 28-38

  33. Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)

  34. A Constraint Logic Programming Approach to SOC Test Scheduling
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)

  35. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)

  36. Validation of Embedded Systems using Formal Method aided Simulation
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)

  37. Analysis and Synthesis of Distributed Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Kluwer Academic Publishers (now part of Springer-Verlag), ISBN: 1-4020-2872-5, 2004, XXII, 326 p.

  38. Design Optimization of Time- and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 864-869 (best paper award)

  39. Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 514-519

  40. Schedulability-Driven Frame Packing for Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems, Vol. 4, No. 1, February 2005, pp. 112-140

  41. An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint
    Stina Edbom, Erik Larsson
    2004 IEEE Asian Test Symposium (ATS 2004), Kenting, Taiwan, November 15-17, 2004, pp. 254-257

  42. Hybrid BIST Test Scheduling Based on Defect Probabilities
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    2004 IEEE Asian Test Symposium (ATS 2004), Kenting, Taiwan, November 15-17, 2004, pp. 230-235

  43. An Improved Estimation Methodology for Hybrid BIST Cost Calculation
    Gert Jervan, Zebo Peng, Raimund Ubar, Olga Korelina
    IEEE Norchip 2004, Oslo, Norway, November 8-9, 2004, pp. 297-300

  44. Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    International Conference on Computer Aided Design (ICCAD 2004), San Jose, USA, November 7-11, 2004, pp. 362-269.

  45. Integrating Core Selection in the SOC Test Solution Design-Flow
    Erik Larsson
    International Test conference (ITC'04), Charlotte, NC, USA, October 2004, pp. 1349-1358

  46. A Formal Verification Approach for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    Forum on Specification and Design Languages, Lille, France, September 13-17, 2004, pp. 556-567

  47. A Formal Verification Methodology for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, Architectures, Methods and Tools, Rennes, France, August 31-September 3, 2004, pp 372-379.

  48. A Heuristic for Wiring-Aware Built-In Self-Test Synthesis
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, Architectures, Methods and Tools, Rennes, France, August 31-September 3, 2004, pp. 408 - 415

  49. Combining Static and Dynamic Scheduling for Real-Time Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Workshop on Software Analysis and Development for Pervasive Systems (SONDA 2004), Invited Paper, Verona, Italy, August 24, 2004, pp. 32-40.

  50. Student-oriented Examination in a Computer Architecture Course
    Erik Larsson, Anders Larsson
    9th Annual Conference on Innovation and Technology in Computer Science Education, Leeds, UK, June 28-30, 2004, pp 245.

  51. Schedulability Analysis of Applications with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems (TECS), Vol. 3, No. 4, November 2004, pp. 706-735

  52. A Technique for Optimization of System-on-Chip Test Data Transportation
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    9th IEEE European Test Symposium, Corsica, France, May 23-26, 2004, pp. 179-180. (Informal Digest)

  53. Optimization of Soft Real-Time Systems with Deadline Miss Ratio Constraints
    Sorin Manolache, Petru Eles, Zebo Peng
    10th IEEE Real-Time and Embedded Technology and Applications Symposium, Toronto, Canada, May 2004, pp. 562-570.

  54. A Heuristic for Wiring-Aware Built-In Self-Test Synthesis
    Abdil Rashid Mohamed, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)

  55. A Formal Verification Methodology for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)

  56. An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)

  57. A Technique for Optimisation of SOC Test Data Transportation
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)

  58. Design Optimization of mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)

  59. Preemptive System-on-Chip Test Scheduling
    Erik Larsson, Hideo Fujiwara
    IEICE Transactions on Information Systems. Special Issue on Test and Verification of VLSI, Vol. E87-D, No. 3, March 2004, pp.620-629

  60. Core Selection Integrated in the SOC Test Solution Design-Flow
    Erik Larsson
    International Workshop on Test Resource Partitioning (TRP), Napa Valley, USA, April 2004

  61. Defect-Aware SOC Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    2004 IEEE VLSI Test Symposium (VTS'04), Napa Valley, USA, April 2004, pp. 359-364

  62. Efficient Test Solutions for Core-based Designs
    Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
    IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Vol.23, No.5, May 2004, pp. 758-775

  63. An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The 5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004, pp. 98-103

  64. Design Optimization of Multi-Cluster Embedded Systems for Real-Time Applications
    Paul Pop, Petru Eles, Zebo Peng, Viacheslav Izosimov, Magnus Hellring, Olof Bridal
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 1028-1033

  65. Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 518-523

  66. Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 1176-1181

  67. Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 115-120

  68. Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 3-8

  69. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 413-415

  70. Iterative Schedule Optimisation for Voltage scalable Distributed Embedded Systems
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    ACM Transactions on Embedded Computing Systems, Vol. 3, Nr. 1, 2004, pp. 182-217

  71. System-Level Design Techniques for Energy-Efficient Embedded Systems
    Marcus T. Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Kluwer Academic Publishers, ISBN 1-4020-7750-5, December 2003

  72. Towards Formal Verification in a Component-based Reuse Methodology
    Daniel Karlsson
    Licentiate Thesis No. 1058, Dept. of Computer and Information Science, Linköping University, December 2003

  73. Modeling and Formal Verification of Embedded Systems based on a Petri Net Representation
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Journal of Systems Architecture (JSA), Special Issue on System and Circuit Synthesis and Verification, vol. 49, no. 12-15, December 2003, pp. 571-598.

  74. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    4th Workshop on RTL and High Level Testing (WRTLT'03), Xian, China, November 20-21, 2003

  75. Test Time Minimization for Hybrid BIST of Core-Based Systems
    Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 318-323

  76. SOC Test Time Minimization Under Multiple Constraints
    Julien Pouget, Erik Larsson, Zebo Peng
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 312-317

  77. Optimal System-on-Chip Test Scheduling
    Erik Larsson, Hideo Fujiwara
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 306-311

  78. Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The 21st NORCHIP Conference, Riga, Latvia, November 10-11, 2003, pp. 112-116

  79. Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
    Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
    18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 225-232

  80. Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 385-392

  81. Design Optimization of Mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    CODES+ISSS 2003 (merged conference), Newport Beach, California, USA, October 1-3, 2003, pp. 83-89.

  82. A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling
    Erik Larsson, Zebo Peng
    International Test Conference (ITC) 2003, Charlotte, NC, USA, September 30 - October 2, 2003, pp. 1135-1144. (Paper 44.2)

  83. Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems
    Dong Wu, Bashir M. Al-Hashimi, Petru Eles
    IEE Proceedings - Computers and Digital Techniques, Vol. 150, Issue 5, September 2003, pp. 303-312

  84. Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Technical Report, Embedded Systems Lab, Dept. of Computer and Information Science, Linköping University, September 2003.

  85. Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered Real-Time Systems
    Traian Pop, Petru Eles, Zebo Peng
    15th Euromicro Conference on Real-Time Systems (ECRTS 2003), Porto, Portugal, July 2-4, 2003, pp. 257-266

  86. Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems
    Paul Pop
    Ph. D. Thesis No. 833, Dept. of Computer and Information Science, Linköping University, June 2003 (Opponent: Prof. Rolf Ernst, Technical University of Braunschweig, Germany)

  87. Scheduling and Optimisation of Heterogeneous Time/Event-Triggered Distributed Embedded Systems
    Traian Pop
    Licentiate Thesis No. 1022, Dept. of Computer and Information Science, Linköping University, June 2003

  88. An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling
    Julien Pouget, Erik Larsson, Zebo Peng, Marie-Lise Flottes, Bruno Rouzeyre
    IEEE European Test Workshop 2003 (ETW'03), Maastricht, The Netherlands, May 25-28, 2003, pp 51-56 (Formal Proceedings)

  89. An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling
    Julien Pouget, Erik Larsson, Zebo Peng, Marie-Lise Flottes, Bruno Rouzeyre
    IEEE European Test Workshop 2003 (ETW'03), Maastricht, The Netherlands, May 25-28, 2003, pp. 117-122 (Informal Proceedings)

  90. Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Technical Report, Embedded Systems Lab, Dept. of Computer and Information Science, Linköping University, April 2003.

  91. Test Resource Partitioning and Optimization for SOC Designs
    Erik Larsson, Hideo Fujiwara
    2003 IEEE VLSI Test Symposium (VTS'03), Napa Valley, USA, 27 April - 1 May 2003, pp. 319-324

  92. Defect Probability-based System-On-Chip Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    6th IEEE International Workshop on Design and Diagnostics of Electronics Circuits and Systems (DDECS'03), Poznan, Poland, April 14-16, 2003, pp. 25-32

  93. Automatic Generation of a Formal Verification Bench for a Reuse Methodology
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)

  94. System-on-Chip Test Resource Partitioning and Optimization
    Erik Larsson
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)

  95. Optimal Test Time for System-on-Chip Designs using Preemptive Scheduling and Reconfigurable Wrappers
    Erik Larsson, Hideo Fujiwara
    Nara Institute of Science and Technology (NAIST), NAIST-IS-TR2002011, Japan, July 2002.

  96. Preemptive Power Constrained TAM Scheduling for Scan-based System-on-Chip
    Erik Larsson, Hideo Fujiwara
    Nara Institute of Science and Technology (NAIST), ISSN 0919-9527, NAIST-IS-TR2002003, Japan, January 2002.

  97. High-Level and Hierarchical Test Sequence Generation
    Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)

  98. System-on-Chip Test Scheduling based on Defect Probability
    Erik Larsson, Julien Pouget, Zebo Peng
    2003 International Test Synthesis Workshop (ITSW), Santa Barbara, CA, USA, March 31 - April 2, 2003

  99. A Co-Design Methodology for Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 960-965

  100. Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems
    Dong Wu, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 90-95

  101. Schedulability-Driven Frame Packing for Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    ACM SIGPLAN Conference on Languages, Compilers and Tools for Embedded Systems, 11-13 June 2003, San Diego, USA, pp. 113-122

  102. Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 184-189

  103. Schedulability Analysis of Real-Time Systems with Stochastic Task Execution Times
    Sorin Manolache
    Licentiate Thesis No. 985, Dept. of Computer and Information Science, Linköping University, Dec. 2002

  104. An Integrated Framework for the Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng
    SOC (System-on-a-Chip) Testing for Plug and Play Test Automation.
    Book Series: FRONTIERS IN ELECTRONIC TESTING, Volume 21, Krishnendu Chakrabarty (editor)
    Kluwer Academic Publishers, ISBN 1-4020-7205-8, September 2002, pp. 21-36

  105. Integrated Design and Test Generation Under Internet Based Environment MOSCITO
    Andre Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatova, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng
    EUROMICRO Symposium on Digital System Design (DSD'2002), Dortmund, Germany, Sept. 4-6, 2002, pp. 187-194

  106. Optimal Test Access Mechanism Scheduling using Preemption and Reconfigurable Wrappers
    Erik Larsson, Hideo Fujiwara
    Workshop on RTL and High Level Testing, Guam, USA, November 21-22, 2002

  107. High-Level Test Generation and Built-In Self-Test Techniques for Digital Systems
    Gert Jervan
    Licentiate Thesis No. 973, Dept. of Computer and Information Science, Linköping University, Oct. 2002

  108. Synthesizing Energy-Efficient Embedded Systems with LOPOCOS
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation for Embedded Systems, Volume 6, Issue 4, pp. 401-424, Kluwer Academic Publishers, 2002

  109. High-Level and Hierarchical Test Sequence Generation
    Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    IEEE International Workshop on High Level Design Validation and Test, Cannes, France, October 27-29, 2002, pp. 169-174

  110. Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    IEE Computers and Digital Techniques Journal, (special issue with best papers from DATE'03 Conference), Vol. 150, No. 5, pp. 303-312, September 2003

  111. Schedulability-Driven Communication Synthesis for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Real-Time Systems Journal, No. 24, pp. 297-325, 2004

  112. Integrated Test Scheduling, Test Parallelization and TAM Design
    Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
    IEEE Asian Test Symposium (ATS'02), Tamuning, Guam, USA, November 18-20, 2002, pp. 397-404

  113. High-Level Synthesis and Test in the MOSCITO-Based Virtual Laboratory
    Andre Schneider, Karl-Heinz Diener, Gert Jervan, Zebo Peng, Jaan Raik, Raimund Ubar, Thomas Hollstein, Manfred Glesner
    The 8th biennial Baltic Electronics Conference (BEC 2002), Tallinn, Estonia, October 6-9, 2002, pp. 287-290

  114. Schedulability Analysis of Multiprocessor Real-Time Applications with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    Int'l Conference on Computer Aided Design, ICCAD 02, San Jose, California, USA, November 10-14, 2002, pp. 699-706

  115. Formal Verification in a Component-based Reuse Methodology
    Daniel Karlsson, Petru Eles, Zebo Peng
    International Symposium on System Synthesis (ISSS) 2002, Kyoto, Japan, October 2-4, 2002, pp. 156-161

  116. An Approach to Reducing Verification Complexity of Real-Time Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    14th Euromicro Conference on Real-Time Systems (ECRTS 2002), Work-in-Progress Session, Vienna, Austria, June 19-21, 2002, pp. 45-48.

  117. Power Constrained Preemptive TAM Scheduling
    Erik Larsson, Hideo Fujiwara
    European Test Workshop 2002, Corfu, Greece, May 26-29, 2002, pp. 119-126 (Formal Proceedings)

  118. Power Constrained Preemptive TAM Scheduling
    Erik Larsson, Hideo Fujiwara
    European Test Workshop 2002, Corfu, Greece, May 26-29, 2002, pp. 411-416 (Informal Digest)

  119. Report D1: Report on benchmark identification and planning of experiments to be performed
    Gert Jervan, Zebo Peng, Matteo Sonza Reorda, Massimo Violante
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.

  120. Report D2: Report on automatic generation of test benches from system-level descriptions
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    COTEST Project Report, Politecnico di Torino, 2002.

  121. Report D4: Final Report on Project Results
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.

  122. Report D5: Report on Dissemination Plan
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.

  123. Holistic Scheduling and Analysis of Mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    10th International Symposium on Hardware/Software Codesign (CODES 2002), Estes Park, Colorado, USA, May 6-8, 2002, pp. 187-192

  124. Symbolic Model Checking of Dual Transition Petri Nets
    Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejandro Cortes, Petru Eles, Zebo Peng
    10th International Symposium on Hardware/Software Codesign (CODES 2002), Estes Park, Colorado, USA, May 6-8, 2002, pp. 43-48.

  125. An Integrated Framework for the Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), for the Special Issue on Plug-and-Play Test Automation for System-on-a-Chip August 2002 issue (vol. 18, no. 4/5), pp. 385-400

  126. BIST Synthesis: An Approach to Resources Optimization under Test Time Constraints
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    5th Design and Diagnostic of Electronic Computer Systems (DDECS2002), Brno, Czech Republic, April 16-19, 2002, pp. 346-351

  127. Verification of Real-Time Embedded Systems using Petri Net Models and Timed Automata
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), Tokyo, Japan, March 18-20, 2002, pp. 191-199.

  128. Flexibility Driven Scheduling and Mapping for Distributed Real-Time Systems
    Paul Pop, Petru Eles, Zebo Peng
    8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), March 18-20, 2002, Tokyo, Japan, pp. 337-346

  129. A Hybrid BIST Architecture and its Optimization for SoC Testing
    Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
    IEEE 2002 3rd International Symposium on Quality Electronic Design (ISQED'02), March 18-20, 2002, San Jose, California, USA, pp. 273-279

  130. Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe Conference (DATE 2002), Paris, France, March 4-8, 2002, pp. 514-521

  131. A Petri Net based Modeling and Verification Technique for Real-Time Embedded Systems
    Luis Alejandro Cortes
    Licentiate Thesis No. 919, Dept. of Computer and Information Science, Linköping University, Dec. 2001.

  132. Modeling and Verification of Embedded Systems using Petri Net based Methods: Application to an Industrial Case
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, December 2001.

  133. The Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng, Gunnar Carlsson
    ICCAD-2001, DoubleTree Hotel, San Jose, California, November 4-8, 2001, pp. 523-530

  134. Using Tabu Search Method for Optimizing the Cost of Hybrid BIST
    Raimund Ubar, Helena Kruus, Gert Jervan, Zebo Peng
    16th Conference on Design of Circuits and Integrated Systems (DCIS 2001), Porto, Portugal, November 20-23, 2001, pp. 445-450

  135. Test Scheduling and Scan-Chain Division Under Power Constraint
    Erik Larsson, Zebo Peng
    Tenth Asian Test Symposium (ATS 2001), Kyoto, Japan, November 19-21, 2001, pp. 259-264

  136. Hierarchical Modeling and Verification of Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Euromicro Symposium on Digital Systems Design, Warsaw, Poland, Sept. 4-6, 2001, pp. 63-70.

  137. Fast Test Cost Calculation for Hybrid BIST in Digital Systems
    Raimund Ubar, Gert Jervan, Zebo Peng, Elmet Orasson, Rein Raidma
    Euromicro Symposium on Digital Systems Design, Warsaw, Poland, Sept. 4-6, 2001, pp. 318-325

  138. Challenges for Future System-on-Chip Design
    Thomas Hollstein, Zebo Peng, Raimund Ubar, Manfred Glesner
    15th European Conference on Circuit Theory and Design, Espoo, Finland, August 28-31, 2001

  139. An Approach to Incremental Design of Distributed Embedded Systems
    Paul Pop, Petru Eles, Traian Pop, Zebo Peng
    38th Design Automation Conference (DAC), Las Vegas, USA, June 18-22, 2001, pp. 450-455 (best paper award candidate)

  140. Memory and Time-Efficient Schedulability Analysis of Task Sets with Stochastic Execution Time
    Sorin Manolache, Petru Eles, Zebo Peng
    13th Euromicro Conference on Real-Time Systems, Delft, The Netherlands, June 13-15, 2001, pp. 19-26

  141. SOCWARE: A New Swedish Design Cluster For System-On-Chip
    Petru Eles, Peter Nilsson, Hannu Tenhunen
    International Conference on Microelectronic Systems Education, Las Vegas, USA, June 2001, pp. 44-45

  142. System-on-Chip Test Parallelization Under Power Constraints
    Erik Larsson, Zebo Peng
    European Test Workshop, Stockholm, Sweden, May 28-June 1, 2001.

  143. A Front End to a Java Based Environment for the Design of Embedded Systems
    Daniel Karlsson, Petru Eles, Zebo Peng
    4th IEEE DDECS Workshop, Gyor, Hungary, April 2001, pp. 71-78

  144. From Haskell to PRES+ Basic Translation Procedures
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, April 2001.

  145. Minimizing System Modification in an Incremental Design Approach
    Paul Pop, Petru Eles, Traian Pop, Zebo Peng
    International Workshop on Hardware/Software Codesign (CODES 2001), Copenhagen, Denmark, April 25-27, 2001, pp. 183-188

  146. BIST Synthesis: An Approach to Resource Optimization under Test Time Constraints
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    International Test Synthesis Workshop, Santa Barbara, USA, March 26-28, 2001

  147. Improving the Efficiency of Timing Simulation of Digital Circuits
    Artur Jutman, Raimund Ubar, Zebo Peng
    Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 13-16 March, 2001, pp. 460-466

  148. An Integrated System-On-Chip Test Framework
    Erik Larsson, Zebo Peng
    Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 13-16 March, 2001, pp. 138-144

  149. Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems
    Paul Pop
    Second EDAA Ph.D. Forum, Design Automation and Test in Europe Conference, Paris, France, 2004

  150. Scheduling, Mapping and Communication Synthesis for Distributed Real-Time Systems
    Paul Pop
    ACM SIGDA PhD Forum at the Design Automation Conference (DAC 2002), New Orleans, LA, USA, 2002

  151. Incremental Mapping and Scheduling for Distributed Heterogeneous Real-Time Systems
    Paul Pop, Petru Eles, Zebo Peng
    Real-Time in Sweden, August 18-19, 2003, Västerås, Sweden

  152. An Improved Scheduling Technique for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    SNART'99 Real-Time Systems Conference, August 25-25, 2003, Linkö;ping, Sweden

  153. Comparing Web Applications with Desktop Applications: An Empirical Study
    Paul Pop
    Technical Report

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